基于DICE单元的抗SEU加固SRAM设计

DICE单元是一种有效的SEU加固方法,但是,基于DICE单元的SRAM在读写过程中发生的SEU失效以及其外围电路中发生的失效,仍然是加固SRAM中的薄弱环节.针对这些问题,提出了分离位线结构以解决DICE单元读写过程中的翻转问题,并采用双模冗余的锁存器加固方法解决外围电路的SEU问题.模拟表明本文的方法能够有效弥补传统的基于DICE单元的SRAM的不足.

SEU hardened SRAM design based on DICE cell

DICE cell is an effective method to mitigate SEU effects.SEU,however,still occur in DICE cell-based SRAMs,due to the weakness of DICE cell during reading and writing,and the weakness in the peripheral circuits.A separated-bit-line structure is proposed to handle the DICE cell’s upset during reading and writing,and a double module redundancy method is presented to resolve the upset in the peripheral circuits.The simulation results show these methods are effective to mitigate SEU from DICE cell based SRAMs.