| LS-DSP路由器的低功耗设计 |
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| 引用本文： | 李剑川,王忠,车德亮.LS-DSP路由器的低功耗设计[J].国防科技大学学报,2007,29(4):52-56. |
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| 作者姓名： | 李剑川 王忠 车德亮 |
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| 作者单位： | 1. 西安微电子技术研究所,陕西,西安,710054;国防科技大学,机电工程与自动化学院,湖南,长沙,410073
2. 西安微电子技术研究所,陕西,西安,710054 |
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| 基金项目： | 国家863高技术计划项目(2002AA714022)，国家部委资助项目(41308010203) |
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| 摘 要： | LS-DSP是用于航天图像处理的数字信号处理器,内部的协处理器由处理元PE阵列构成。路由器则是实现PE阵列网格互连的专用部件,也是操作最频繁的部件。如何降低处理器功耗,提高算法的执行效率是一个非常重要的研究课题。针对LS-DSP路由器的电路进行门控时钟的低功耗设计改进,并以算法为例进行了控制、执行过程功耗分析和比较。实验结果表明,改进结构的路由器降低功耗76%。
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| 关 键 词： | DSP 路由器 低功耗 门控时钟 |
| 文章编号： | 1001-2486(2007)04-0052-05 |
| 收稿时间： | 2007/1/30 0:00:00 |
| 修稿时间： | 2007年1月30日 |
Low Power Design of Router for LS-DSP |
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| LI Jianchuan,WANG Zhong and CHE Deliang.Low Power Design of Router for LS-DSP[J].Journal of National University of Defense Technology,2007,29(4):52-56. |
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| Authors: | LI Jianchuan WANG Zhong and CHE Deliang |
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| Abstract: | LS-DSP,of which the inner coprocessor is composed of process unit PE,is a Digital Signal Processor used for aerospace image processing.Router is a special unit which interlinks PE net array,and it is also the part most frequently used for operation.How to depress power of processor and elevate calculate efficiency is an important topic for research.Aimed at a low power improvement in the circuit of LS-DSP router,a design base on clock-gating was carried out,and the algorithm was taken as an example to make the power consumption analysis and comparison of the control and operation process.The experimental results show that the improved architecture can reduce the router power consumption by 76%. |
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| Keywords: | digital signal processor router low-power clockgating |
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