| 基于全局时态逻辑(GTL)的验证和测试生成研究 |
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| 引用本文： | 何新华,吕昌龄. 基于全局时态逻辑(GTL)的验证和测试生成研究[J]. 装甲兵工程学院学报, 1996, 0(1) |
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| 作者姓名： | 何新华 吕昌龄 |
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| 作者单位： | 装甲兵工程学院计算机教研室，装甲兵工程学院计算机教研室 北京，100072，北京，100072 |
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| 摘 要： | 基于时态逻辑,定义了标准的逻辑操作公式、公理和扩展定理。根据测试生成和验证所要求的初始特性,提出了全局时态逻辑（Global Temporal Logic）GTL,避免了验证和测试中的回溯问题,从而提高验证和测试的效率。另外根据电路节点的扇入和扇出特性,介绍了利用时序线等启发知识来提高搜索策略的方法。
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| 关 键 词： | 时态逻辑 验证 测试生成 故障 |
GTL-based Verification and Test Generation |
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| He Xinhua Lu Changlin. GTL-based Verification and Test Generation[J]. Journal of Armored Force Engineering Institute, 1996, 0(1) |
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| Authors: | He Xinhua Lu Changlin |
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| Affiliation: | He Xinhua Lu Changlin |
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| Abstract: | This paper defines the standard logic operation formula, axiom and extended theorem based on the TL (Temporal Logic). In order to avoid backtracking operation in verification and test senera-tion, GTL (Global Temporal Logic) is described in accordance with the initial featares required by the test generation and verification, so that the efficiency is greatly improved. Besides, this paper introduces the method to improve the search strategy through sequential line according to the charateristices of the circuit nodes. |
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| Keywords: | Temporal logic verification test generation fault |
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