| 数字式鉴相器的相位失真分析 |
| |
| 引用本文： | 魏福立,宋振辉.数字式鉴相器的相位失真分析[J].军械工程学院学报,1999(3). |
| |
| 作者姓名： | 魏福立 宋振辉 |
| |
| 作者单位： | 信息产业部电子13所!石家庄，050051，邯郸职工大学!邯郸，056001 |
| |
| 摘 要： | 数字式鉴相器的相位失真是导致产生寄生信号和额外相位噪声并使锁相环路不稳定的主要因素之一。锁相环路是通讯设备、测试仪器和雷达中的一个关键部件，因此，减少鉴相器相位失真，对于系统设计是很重要的。利用差分电路，可以有效地减小鉴相器相位失真的影响。
|
| 关 键 词： | 数字式鉴相器 相位失真 冒险竞争 差分电路 |
THE ANALYSIS OF PHASE DISTORTION IN DIGITAL PHASE/FREQUENCY DETECTORS |
| |
| Wei Fuli,Song Zhenhui.THE ANALYSIS OF PHASE DISTORTION IN DIGITAL PHASE/FREQUENCY DETECTORS[J].Journal of Ordnance Engineering College,1999(3). |
| |
| Authors: | Wei Fuli Song Zhenhui |
| |
| Abstract: | Distortion in digital phase/frequency detectors is one of the main factor in causing instability, spurious signals, and excessive phase noise in phaselocked loops (PLLS). Since PLCS are key components in communication equipment, test instruments, and radar, reducing this distortion is important for system performance. A differential circuit can be used to minimize the effects of detector phase distortion. |
| |
| Keywords: | digital phase/frequency detectors phase distortion risk compete differential circuit |
| 本文献已被 CNKI 等数据库收录！ |
