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基于SHARC流水集束型多处理器板研制
引用本文:马海潮,高梅国. 基于SHARC流水集束型多处理器板研制[J]. 火力与指挥控制, 2001, 26(3): 70-73
作者姓名:马海潮  高梅国
作者单位:1. 解放军92941部队,辽宁,葫芦岛,125001
2. 北京理工大学,北京,100081
摘    要:结合某重点工程课题 ,设计和实现了基于 SHARC流水集束型多处理器板即研制出了具有 5个 SHARC的高速并行数字信号处理机。板上处理器数量可实现重配置以获得高的性价比。当板上前端 4个 SHARC用于 FFT时 ,研究和分析了板上前端 4个 SHARC用于 FFT时的三种不同缓冲数据模式下 FFT节点处理性能

关 键 词:雷达数字信号处理系统  多DSP并行处理  FFT
文章编号:1002-0640(2001)03-0070-04
修稿时间:2000-09-28

SHRAC-Based Pipeline and Cluster Multi-DSP Board Development
MA Hai chao,GAO Mei guo. SHRAC-Based Pipeline and Cluster Multi-DSP Board Development[J]. Fire Control & Command Control, 2001, 26(3): 70-73
Authors:MA Hai chao  GAO Mei guo
Abstract:The SHARC based pipeline and cluster multi DSP board has been developed that is a high speed parallel digital signal processing system with five SHARC chips.A number of SHARC chips on the board can be reconfigured to get a high ratio of Efficiency/cost.The SHARC of the front four SHARC chips on the board as a node is used for FFT,and three different data buffer modes are proposed and analyzed for the time of FFT carried out by each node.
Keywords:radar digital signal processing system  multi DSP parallel processing  FFT
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