| 基于测试码并行的同步时序电路故障模拟方法 |
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| 引用本文： | 刘胜利,刘蓬侠,曾芷德. 基于测试码并行的同步时序电路故障模拟方法[J]. 装甲兵工程学院学报, 2001, 15(3): 85-90 |
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| 作者姓名： | 刘胜利 刘蓬侠 曾芷德 |
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| 作者单位： | 国防科技大学计算机学院,长沙,410073 |
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| 摘 要： | 将组合电路故障模拟的一些加速技术推广到时序电路故障模拟中,提出并实现了一个功能块级的基于测试码并行的同步时序电路故障模拟方法,对部分ISCAS89 Benchmark电路的模拟结果表明,该故障模拟方法有较好的性能.
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| 关 键 词： | 故障模拟 测试码并行 单故障传播 反向追踪 无扇出区域 |
| 修稿时间： | 2000-09-10 |
Parallel Test Pattern Based Fault Simulation Method for Synchronous Sequential Circuit |
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| LIU Sheng-li,LIU Peng-xia,ZENG Zhi-de. Parallel Test Pattern Based Fault Simulation Method for Synchronous Sequential Circuit[J]. Journal of Armored Force Engineering Institute, 2001, 15(3): 85-90 |
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| Authors: | LIU Sheng-li LIU Peng-xia ZENG Zhi-de |
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| Abstract: | Appling some speed-up techniques in fault simulation of combinational circuits to se- quential circuits, the paper presents and implement a parallel test pattern based fault simulation method for synchronous sequential circuit, experimental results on some circuits of ISCAS89 Be- nchmark reveal that the fault simulation method has good performance. |
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| Keywords: | fault simulation test pattern parallelism single fault propagation reverse trace fan out-free region |
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