| 基于提升算法的二维DWT高效VLSI实现结构 |
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| 引用本文： | 康志伟,颜福权,何怡刚. 基于提升算法的二维DWT高效VLSI实现结构[J]. 国防科技大学学报, 2005, 27(6): 48-52 |
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| 作者姓名： | 康志伟 颜福权 何怡刚 |
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| 作者单位： | 湖南大学,计算机与通信学院,湖南,长沙,410082;湖南大学,电气与信息工程学院,湖南,长沙,410082 |
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| 基金项目： | 国家自然科学基金资助项目(50277010)，高校博士点基金资助项目(20020532016) |
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| 摘 要： | 以CDF9/7小波为例构造了一种二维DWT变换的高效VLSI结构。采用改进的提升算法,减少了关键路径上的延时。把乘法器系数表示为CSD形式,将乘法优化为最少的移位加操作。提出了一种行变换和列变换同时进行的方法和实现结构,并且整个结构采用流水线处理。通过VHDL的行为级仿真,得到的数据和软件仿真的结果相同,证明了该结构的正确性。和其它结构相比,该结构处理速度更快,并且硬件利用率可达100%。
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| 关 键 词： | 提升算法 小波变换 二维DWT VLSI 并行结构 |
| 文章编号： | 1001-2486(2005)06-0048-05 |
| 收稿时间： | 2005-04-20 |
| 修稿时间： | 2005-04-20 |
An Efficient VLSI Architecture for Two-dimensional DWT Based on the Lifting Scheme |
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| KANG Zhiwei,YAN Fuquan and HE Yigang. An Efficient VLSI Architecture for Two-dimensional DWT Based on the Lifting Scheme[J]. Journal of National University of Defense Technology, 2005, 27(6): 48-52 |
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| Authors: | KANG Zhiwei YAN Fuquan HE Yigang |
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| Affiliation: | KANG Zhi-wei~1,YAN Fu-quan~1,HE Yi-gang~2 |
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| Abstract: | An efficient VLSI architecture for two-dimension DWT is proposed and illustrated in detail for the CDF9/7 wavelet transform.The improved lifting scheme is adopted to reduce the critical path delay.Coefficients of the multipliers are transformed into CSD forms and then the multiplications are substituted by shift-add operations.The row transform and column transform are running simultaneously and pipeline design is used to optimize the architecture.This architecture is implemented through behavioral VHDL.The results are identical with those of the software simulation,and thus the validity of this architecture is proved.Compared with other architectures,this one has the advantages of faster computation time and almost 100% hardware utilization. |
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| Keywords: | lifting scheme wavelet transform two-dimensional DWT VLSI parallel architecture |
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