可变速率调制器研究及其FPGA实现

提出了一种变速率调制系统的设计方法。基于现场可编程门阵列(FPGA),在硬件系统中实现了新方法。所设计的系统能够处理(13.5~300)Mbps连续变化的比特速率。通过将整个可变速率范围分成若干小段,分别经过不同倍数的采样滤波,保证了所有符号速率对应的数据能够被调制到数模转换芯片(DAC)处理范围内。给出了系统整体设计结构,分析了硬件实现时的难点,论述了并行采样滤波与并行载波生成等设计方法。硬件实现结果表明,所提出的设计方法能够实现对较宽范围内连续可变速率信号的调制。系统的易扩展性也保证了所设计结构能够处理更宽的变速率范围。

Research on variable rate modulator and its implementation on FPGA

A variable modulator scheme is presented. The hardware system adopting the proposed approach is accomplished based on field programmable gate array (FPGA). The proposed system could deal with signals with bit rate even varying from 13.5~300Mbps continuously. By spliting the whole rate range into several small parts and filtering the input data with different interpolation times, the correctness of transfering all rate into the dealing range of digital analog convert (DAC) is ensured. The architecture of system is devised and the difficulties in hardware realization are analysed. The ways to solving the pivotal problem are particularly indicated. Realization on FPGA demonstrates the good performance of the proposed idea. The expansibility of system makes it easy to be applied in more wider rate bound.