首页 | 本学科首页   官方微博 | 高级检索  
     

多核数字信号处理器并行矩阵转置算法优化
引用本文:裴向东,王庆林,廖林玉,李荣春,梅松竹,刘杰,庞征斌. 多核数字信号处理器并行矩阵转置算法优化[J]. 国防科技大学学报, 2023, 45(1): 57-66
作者姓名:裴向东  王庆林  廖林玉  李荣春  梅松竹  刘杰  庞征斌
作者单位:国防科技大学 计算机学院, 湖南 长沙 410073;国防科技大学 计算机学院, 湖南 长沙 410073;国防科技大学 并行与分布处理国防科技重点实验室, 湖南 长沙 410073
基金项目:国家自然科学基金资助项目(62002365)
摘    要:矩阵转置是矩阵运算的基本操作,广泛应用于信号处理、科学计算以及深度学习等各种领域。随着国防科技大学自主研制的飞腾异构多核数字信号处理器(digital signal processor, DSP)在各种领域中的推广应用,对高性能矩阵转置实现提出了强烈需求。针对飞腾异构多核DSP的体系结构特征与矩阵转置操作的特点,提出了一种适配不同数据位宽(8 B、4 B以及2 B)矩阵的并行矩阵转置算法ftmMT。该算法基于DSP中向量处理单元的Load/Store部件实现了向量化,同时基于矩阵分块实现了多个DSP核的并行处理,通过隐式乒乓设计实现了片上向量化转置与片外访存的重叠以及访存性能的大幅提升。实验结果表明,ftmMT能够显著加快矩阵转置操作,与CPU上的开源转置库HPTT相比,可获得高达8.99倍的性能加速。

关 键 词:多核DSP  矩阵转置  并行算法  算法优化
收稿时间:2022-07-09

Optimizing parallel matrix transpose algorithm on multi-core digital signal processors
PEI Xiangdong,WANG Qinglin,LIAO Linyu,LI Rongchun,MEI Songzhu,LIU Jie,PANG Zhengbin. Optimizing parallel matrix transpose algorithm on multi-core digital signal processors[J]. Journal of National University of Defense Technology, 2023, 45(1): 57-66
Authors:PEI Xiangdong  WANG Qinglin  LIAO Linyu  LI Rongchun  MEI Songzhu  LIU Jie  PANG Zhengbin
Affiliation:College of Computer Science and Technology, National University of Defense Technology, Changsha 410073, China;College of Computer Science and Technology, National University of Defense Technology, Changsha 410073, China;Science and Technology on Parallel and Distributed Processing Laboratory, National University of Defense Technology, Changsha 410073, China
Abstract:Matrix transpose is one of the common matrix operations, which is widely employed in various fields such as signal processing, scientific computing, and deep learning. With the popularization of Phytium heterogeneous multi-core DSPs(digital signal processors) developed by National University of Defense Technology, there is a strong demand for high-performance matrix transpose implementations for Phytium multi-core DSPs. Based on the architecture of multi-core DSPs and the characteristic of matrix transpose operations, a parallel matrix transpose algorithm (called ftmMT) for matrices with different element bit widths (8 B, 4 B, and 2 B) was proposed. In ftmMT, the main optimizations include vectorization based on vector Load/Store functions, core-level parallelization based on matrix blocking, and overlapping between vectorization and memory access through implicit ping-pong methods. The experimental results show that ftmMT can significantly improve the performance of matrix transpose operations, and achieve a speedup of up to 8.99 times in comparison with the open-source transpose library HPTT running on CPU.
Keywords:multi-core digital signal processors   matrix transpose   parallel algorithm   algorithm optimization
本文献已被 万方数据 等数据库收录!
点击此处可从《国防科技大学学报》浏览原始摘要信息
点击此处可从《国防科技大学学报》下载免费的PDF全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号