| 顺序PROLOG机KD-PP的系统结构和硬件实现技术 |
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| 引用本文： | 刘滨海,闻烽,王剑琪,张晨曦.顺序PROLOG机KD-PP的系统结构和硬件实现技术[J].国防科技大学学报,1990,12(2):106-112. |
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| 作者姓名： | 刘滨海 闻烽 王剑琪 张晨曦 |
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| 作者单位： | 国防科技大学计算机系
(刘滨海，闻烽，王剑琪)，国防科技大学计算机系(张晨曦) |
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| 摘 要： | 本文提出的KD-PP系统是一种基于编译技术的顺序PROLOG推理系统,该系统的设计为逻辑型程序语言PROLOG的实现提供了硬件支持,因而能高效地执行PROLOG程序。本文从数据表示、存储系统、机器状态和指令系统等方面全面地介绍了顺序PROLOG机KD-PP的系统结构和硬件实现技术。
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| 关 键 词： | 系统结构 指令系统 存储器 PROLOG系统 数据表示 |
| 收稿时间： | 1989/6/25 0:00:00 |
Architecture and Hardware Implementation Techniques of the Sequential PROLOG Machine: KD-PP |
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| Liu Binhai,Wen Feng,Wang Jianqi and Zhang Chenxi.Architecture and Hardware Implementation Techniques of the Sequential PROLOG Machine: KD-PP[J].Journal of National University of Defense Technology,1990,12(2):106-112. |
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| Authors: | Liu Binhai Wen Feng Wang Jianqi and Zhang Chenxi |
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| Institution: | Department of Computer science |
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| Abstract: | This paper describes a sequential PROLOG inference processor:KD-PPwhich is based on compilation techniques.The processor has incorporatedhardware mechanisms in it for logic programming language PROLOG execu-tion.So it can execute PROLOG programs at high speed.The architecture of theprocessor,including data format,memory,machine states,instruction set,andthe hardware implementing techniques are described in detal. |
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| Keywords: | system architecture instruction set memory PROLOG system data format |
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